At the IEDM 2021 International Electronic Components Conference in San Francisco, California, IBM and Samsung jointly announced a chip design technology called Vertical Transmission Field Effect Transistor (VTFET), which combines transistors in a vertical manner. Stacking and allowing the current to flow in a vertical manner, so as to increase the number of transistors again, increase the efficiency of the power supply, and break through the current bottleneck in the 1nm process design.
Moreover, compared with the traditional design of stacking transistors in a horizontal manner, vertical transmission field-effect transistors will increase the stacking density of the number of transistors and increase the computing speed by two times. At the same time, by allowing the current to flow in a vertical manner, the power loss will be reduced by 85% (Performance and battery life cannot be taken into account at the same time).
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IBM and Samsung claim that the process may one day allow the phone to be used for a whole week on a single charge. They say this can also make certain energy-intensive tasks, including encryption work, more power-efficient, thereby reducing the impact on the environment.
Furthermore, at present IBM and Samsung have not disclosed when they expect to apply the vertical transmission field-effect transistor design to actual products, but it is expected that there will be further news soon.
However, TSMC has announced in May this year that it will work with the Taiwan University of China and the Massachusetts Institute of Technology to break through the 1nm process production limit through the characteristics of bismuth metal, allowing the process technology to drop below 1nm.
Intel has also announced its future process technology development layout. In addition to the current nanometer (nm)-level process design, Intel will also begin to deploy A-level process technology. It is expected to enter 20A process technology as soon as 2024.
